The use of floating gate Metal Oxide Semiconductor (MOS) devices for storing digital signals is well known. Digital devices such as Electronically Programmable Read Only Memory (EPROM) and Erasable Electronically Programmable Read Only Memory (EEPROM) devices need only generate voltages falling within one of two ranges, each of which corresponds to one of two digital logic levels. Floating gate MOS devices may also be used as analog memory devices in amplifiers, comparators, voltage standards, A/D converters, and D/A converters. For precision versions of these devices, it may be necessary to establish analog voltages with an accuracy of 0.1%. Thus, there is a need for analog circuits in which voltage levels can be adjusted with the requisite precision.
One application for which precision analog memory devices are essential is in trimming voltage offsets in MOS based operational amplifiers, where device mismatches can be substantial. These operational amplifiers typically comprise a pair of differentially connected MOS Field Effect Transistors (MOSFET) with an active drain load such as a current mirror. One method of correcting the voltage offset between the differential MOSFET pair is to connect a floating gate MOS device in parallel with a transistor of a current mirror load. With the gates of the differential MOSFET pair shorted, the voltage of the floating gate is adjusted to shunt more or less current through the MOS device. This is accomplished by monitoring the output of the operational amplifier while the charge on the floating gate of the MOS device is adjusted by means of Fowler Nordheim tunneling. Charge adjustment of the MOS device continues until the voltage at the output of the operational amplifier swings to mid-supply.
The use of single floating gate MOS devices to trim voltage offsets in MOS based operational amplifiers has a number of shortcomings. For example, the voltage-current relationships that govern the injection of electrons onto and removal of electrons from the floating gate are not symmetric about zero voltage. Thus, the magnitude of the voltages necessary to initiate charge transfer to and from the gate are different and produce different charge transfer rates as a function of the magnitude of the applied voltage. In addition, the voltage of the floating gate is subject to short term drift following charge transfer to or from the gate, with the gate voltage drifting back towards its original value over a period of several minutes. This drift can be reduced by making smaller changes in the voltage of the floating gate. However, this lengthens the period of time necessary to adjust the gate voltage to the desired level. Further, a single MOS memory device only adjusts drain current from one of the differentially connected MOSFETs. Consequently, the differential amplifier circuit must be designed so that the voltage offset will always occur in a specific direction. This may be done for example by selecting devices of different sizes for use in the circuit.